News release

Date: 12th March 2012

Cortus Announces Bridges for AHB-Lite™ and APB™ to Enable Migration to the APS and FPS Processor Product Range

Cortus offers low latency bridges between the Cortus APS bus and AHB-Lite™ and APB™. These bridges facilitate the migration of older designs using processors supporting AHB-Lite™ to Cortus APS3 and FPS6 processors.

Dresden, Germany, 12th March 2012. Cortus, a technology leader in ultra low power, silicon efficient 32-bit processor IP, announces the release of two bridges for their processor product range. The first bridge is between the Cortus APS bus and AHB-Lite™ while the second bridge is between the APS bus and APB™.

The Cortus family of processors are supported by the highly efficient, low latency APS bus. This bus provides high speed interfacing between the Cortus processors and synchronous SRAM. The bus is also supported by Cortus’ family of peripherals. Nevertheless, many companies have existing investments in peripherals that use AHB™ or APB™. Furthermore many older 32 bit processor cores make use of the AHB-Lite™ bus.

“We recognise that many IC designers have already invested in peripherals using AHB-Lite™ and APB™” said Michael Chapman, CEO and President of Cortus. He adds, “We are pleased to ensure that licensees of Cortus’ low power, silicon efficient cores can protect their existing investment in peripherals”. The new Cortus bridge products enable licensees of APS3 or FPS6 to cleanly interface to existing AHB™ & APB™ subsystems.
Then new bridges also enable a smooth migration of existing subsystems based on older microcontroller cores to Cortus microcontroller cores. Michael Chapman explains, “C and C++ rather than a particular instruction set are the industry standards for embedded systems”. He adds, “All modern 32-bit cores support C and C++ and the main challenge to migrating designs lies in peripherals for which hardware-dependent software must be written”. In modern system-on-chip applications there is virtually no processor-specific code. Michael Chapman adds, “The new bridges will enable drop-in replacement of older cores by efficient Cortus ones, the main issue for licensees will be writing the interrupt handler”.

The Cortus microcontroller core family includes the highly efficient APS3 and the high performance FPS6 with further cores due for release later in 2012. The APS3 offers the best performance in the industry in terms of DMIPS/mW and DMIPS/mm2 and has been licensed for low power applications such as Bluetooth LE, touchscreen controllers and SIM cards. The FPS6 provides high throughput floating point computation for applications such as motor control and floating point signal processing.

The ecosystem around the Cortus microcontroller cores is rich and well developed, and it includes peripherals commonly used in embedded systems, bus bridges to ensure easy interfacing to other IP and system support and functions such as caches. A full development environment (for C and C++) is available, which can be customised and branded for final customer use. For the most demanding designs the FPS6 can be used in a multi-core configuration.

AHB, AHB-Lite and APB are trademarks of ARM Limited.

Cortus is exhibiting at the Design Automation & Test in Europe (DATE) 2012 Conference in Dresden, Germany from 13th-15th March at stand 35.

About Cortus S.A.:
Cortus S.A. is the price/performance leader for 32 bit processor IP for embedded systems. Cortus cores are used in applications where one or more of small silicon footprint, low power consumption, good code density/small code memory size and high performance are important.
Cortus is the world leader in terms of DMIPS per square micrometre and DMIPS per microwatt.

Cortus S.A. Contact:
David Kerr-Munslow, +

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