Date: 21st October 2013
Sunnyvale, California, 21st October 2013. Cortus, a technology leader in cost effective, silicon efficient, 32-bit processor IP, announces that they have opened an office in Silicon Valley. They have also recruited Jack Dean to head up applications engineering in the Americas.
Mr Dean, a graduate of California State University, Los Angeles, brings extensive technical experience in the development of hardware and software for embedded systems and systems on chip (SoC). He has previously managed the development of hardware platforms and software for automotive and industrial customers at Renesas Electronics America. He has also managed the development of embedded software at JM3 Digital and platform test/verification at Synopsys.
“We are delighted to be opening an office in Silicon Valley”, says Michael Chapman, CEO and President of Cortus, “This is the first major step in the worldwide expansion of Cortus”. He adds, “We are also delighted that Jack Dean has joined us bringing experience of automotive, industrial and security applications”.
The Cortus family of APS processors starts with the world’s smallest 32-bit core, the APS1, and goes up to the floating point FPS6. All cores interface to Cortus’ peripherals including Ethernet 10/100 MAC, USB 2.0 Device and USB 2.0 OTG via the efficient APS bus. They also share the simple vectored interrupt structure which ensures rapid, real time interrupt response, with low software overhead.
The APS toolchain and IDE (for C and C++) is available to licensees free of charge, and which can be customised and branded for final customer use. Ports of various RTOSs are available such as FreeRTOS, Micrium ?C/OSII and ?CLinux.
To date over 500 million devices have been manufactured containing Cortus processor cores.
Notes for Editors:
The Cortus Sunnyvale office is located at Suite 208, 1290 Oakmead Parkway, Sunnyvale, CA 94085.
Tel: +1 (408) 746-5294.
Fax: +1 (408) 746-5289
Cortus S.A.S. is the cost/performance leader for 32 bit processor IP for systems on chip (SoC). Cortus uses a modern RISC architecture optimised for the new wave of low power, intelligent applications including the Internet of Things (IoT). The Cortus processor family comprises the entry level APS1, the energy efficient APS3R, the high performance APS5 and the floating point FPS6. Integrated circuits containing Cortus cores have been manufactured in high volumes for a wide range of applications including automotive, imaging, M2M controllers, secure microcontrollers, sensors, SIM cards, smart metering and wireless.
Roddy Urquhart, +44 753 158 7023